1. Technical Field
The present invention relates to a method for fabricating integrated circuit devices in general, and in particular to a method for fabricating resistors within integrated circuit devices. Still more particularly, the present invention relates to a method for fabricating polysilicon resistors within semiconductor integrated circuit devices.
2. Description of the Prior Art
Resistors are typically used as load devices within a variety of semiconductor integrated circuit (IC) devices. Although such resistors can be formed by any type of resistive material, it is almost a universal practice in the industry to use a very thin layer of either intrinsic or low-doped polycrystalline silicon. This is because polycrystalline silicon resistors, or commonly known as polysilicon resistors, allow for a significant reduction in the device size, which in turn, results in a high integration density. Furthermore, polysilicon resistors can be stacked above field effect transistors (FETs) to provide an even higher integration density.
Polysilicon resistors are also utilized in static random access memory (SRAM) cells and logic latches to reduce single-event upset (SEU) sensitivities in circuits intended for use in environments, such as space, with a high concentration of charged particles. This is because polysilicon resistors, when employed as decoupling resistors, can slow down the regenerative action of SRAM cells by increasing the RC-time constant, which makes the SRAM cells less likely to be upset when a charged particle impacts a sensitive node of the SRAM cell.
Conventionally, polysilicon resistors are incorporated in the gate polysilicon layer of an IC by using a separate doping implant and blocking the formation of silicide in the resistor region. This technique consumes real estate and is not very compatible with scaled (high-density) IC designs. Hence, it is desirable to provide an improved method for fabricating a more compact polysilicon resistor within a semiconductor IC device.
In accordance with a preferred embodiment of the present invention, a resistor is fabricated by first depositing a passivation layer on a semiconductor substrate having multiple transistors previously formed thereon. Next, a first contact window and a second contact window are formed through the first passivation layer at a first contact location and a second contact location, respectively. The first and second contact windows are then filled with metal, such as tungsten, and the metal at the first and second contact windows is planarized to form a first bottom contact and a second bottom contact, respectively. A resistive film, such as polysilicon, subsequently deposited over the first passivation layer. Next, a second passivation layer is formed over the resistive film. Finally, a first top contact and a second top contact are formed to respectively connect the first bottom contact and the second bottom contact to the resistive film.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.